Potato Memory Map





Disclaimer- This information is not based on official documenation and may be wrong.
 

The VMU contains a total of 128 KB of FLASH memory, 24 KB of ROM, 512 bytes of general purpose RAM, 512 bytes of work RAM, maybe 196-198 bytes of screen memory, and 128 bytes of special function registers.  The processor is limited to seeing only 64 KB of code, and 512 bytes of data, so a lot of bank switching occurs.

This chart explains it all and was too hard to produce in HTML, so it's a gif...

There are five bank switches that can be manipulated to access the desired memory:

FLASH bank
Bit 0 of SFR 0x154 contains the 17th address bit used when programming FLASH. Needed only if you are doing low-level write to the hardware; otherwise let the built-in BIOS FLASH routines manipulate this for you.

Code Space
Bit 0 of the EXT register (SFR 0x10D) controls which bank code executes out of. This is typically modified with the instruction NOT1 EXT, 0. Because it’s always modified with a NOT instruction, we don’t know the sense of it. In one case it selects execution of FLASH bank 0, and in the other case it selects execution out of the ROM. This NOT1 is typically followed with a JMPF instruction to the desired address in the other space. It isn't known if the NOT1 takes effect after exactly one instruction, or if the JMPF instruction activates it.

General purpose RAM bank
Bit 1 of the PSW (SFR 0x101) selectes between two memory banks. Bank 0 is used for system variables and always contains the system stack. Bank 1 is the default bank for user programs, and seems generally free for use. The BIOS flash read/write routines use this area.

XRAM (LCD buffer) bank
The XBNK SFR (at 0x125) controls which bank is available for writing. $00= top of LCD screen, $01= bottom of LCD screen, $02= Icons (not usually used by VMS game code).

Work RAM bank
The work ram is only accessible through VTRBF (0x166). VRMAD1 ($164) defines the 8 least significant bits of the address to read or write from, while VRMAD2 ($165) selects the most significant bit. The address can optionally be auto-incremented by setting bit 4 of the VSEL (0x163) register.
 
 

Back to my main vmu page.